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 CS4121
CS4121
Low Voltage Precision Air-Core Tach/Speedo Driver
Description
The CS4121 is specifically designed for use with air-core meter movements. The IC provides all the functions necessary for an analog tachometer or speedometer. The CS4121 takes a speed sensor input and generates sine and cosine related output signals to differentially drive an air-core meter. Many enhancements have been added over industry standard tachometer drivers such as the CS289 or LM1819. The output utilizes differential drivers which eliminates the need for a zener reference and offers more torque. The device withstands 60V transients which decreases the protection circuitry required. The device is also more precise than existing devices allowing for fewer trims and for use in a speedometer. The CS4121 is compatible with the CS8190, and provides higher accuracy at a lower supply voltage (8.0V min. as opposed to 8.5V). It is functionally operational to 6.5V.
Features
s s s s s s Direct Sensor Input High Torque Output Low Pointer Flutter High Input Impedance Overvoltage Protection Accurate to 8V Functional to 6.5V (typ)
Package Options
16 Lead PDIP (internally fused leads)
CP+ SQOUT FREQIN Gnd Gnd COS+ COSVCC
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
Absolute Maximum Ratings Supply Voltage (<100ms pulse transient)..........................................VCC = 60V (continuous) ..............................................................VCC = 24V Operating Temperature .............................................................40C to +105C Storage Temperature..................................................................40C to +165C Junction Temperature .................................................................40C to+150C ESD (Human Body Model) .............................................................................4kV Lead Temperature Soldering Wave Solder (through hole styles only)............10 sec. max, 260C peak Reflow (SMD styles only).............60 sec. max above 183C, 230C peak Block Diagram
+ BIAS CP+ SQOUT Charge Pump F/VOUT
CPF/VOUT VREG Gnd Gnd SINE+ SINEBIAS
20 Lead SOIC (internally fused leads)
CP+ 1 SQOUT
2 3 20 19 18 17 16 15 14 13 12 11
Input Comp. + Voltage Regulator VREG
FREQIN
Gnd VREG 7.0V Gnd COS+
+ +
COS Output
Func. Gen.
+
COSHigh Voltage Protection
VCC
Rev 12/4/96
SINE Output
+
CP-
CPF/VOUT VREG Gnd Gnd Gnd Gnd SIN+ SINBIAS
FREQIN
Gnd 4
Gnd Gnd
Gnd 5 Gnd 6 Gnd
7
SINE+
COS+ 8 COS- 9 VCC 10
SINE-
Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com
1
A
Company
CS4121
Electrical Characteristics: -40C TA 85C, 8.0V VCC 16V unless otherwise specified.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
s Supply Voltage Section ICC Supply Current VCC Normal Operation Range s Input Comparator Section Positive Input Threshold Input Hysteresis Input Bias Current * Input Frequency Range Input Voltage Range Output VSAT Output Leakage Logic 0 Input Voltage
*Note: Input is clamped by an internal 12V Zener.
VCC = 16V, -40C, No Load 8.0
50 13.1
125 16.0
mA V
1.0 200 0V VIN 8V 0 in series with 1k1/2 ICC = 10mA VCC = 7V 1 -1
2.0 500 -10
3.0 -80 20 VCC
V mV A kHz V V A V
0.15
0.40 10
s Voltage Regulator Section Output Voltage Output Load Current Output Load Regulation Output Line Regulation Power Supply Rejection s Charge Pump Section Inverting Input Voltage Input Bias Current Vbias Input Voltage Non Invert. Input Voltage Linearity* F/VOUT Gain Norton Gain, Positive Norton Gain, Negative
*Note: Applies to % of full scale (270).
6.25 0 to 10 mA 8.0V VCC 16V VCC = 13.1V, 1VP/P 1kHz 34
7.00 10 20 46
7.50 10 50 150
V mA mV mV dB
1.5 1.5 IIN = 1mA @ 0, 87.5, 175, 262.5, + 350Hz @ 350Hz, CT = 0.0033F, RT = 243k1/2 IIN = 15A IIN = 15A -0.10 7 0.9 0.9
2.0 40 2.0 0.7 0.28 10 1.0 1.0
2.5 150 2.5 1.1 +0.70 13 1.1 1.1
V nA V V % mV/Hz I/I I/I
s Function Generator Section: -40C TA 85C, VCC = 13.1V unless otherwise noted. Differential Drive Voltage (VCOS+ - VCOS-) Differential Drive Voltage (VSIN+ - VSIN-) Differential Drive Voltage (VCOS+ - VCOS-) Differential Drive Voltage (VSIN+ - VSIN-) Differential Drive Current Zero Hertz Output Angle Function Generator Error * Reference Figures 1,2,3,4 VCC = 13.1V, TA=25C Q = 0 to 305 8.0V VCC 16V Q = 0 8.0V VCC 16V Q = 90 8.0V VCC 16V Q = 180 8.0V VCC 16V Q = 270 8.0V VCC 16V, TA=25C -1.5 -2 5.5 5.5 -7.5 -7.5 6.5 6.5 -6.5 -6.5 33 0.0 0 7.5 7.5 -5.5 -5.5 42 1.5 +2 V V V V mA deg deg
*Note: Deviation from nominal per Table 1 after calibration at 0 and 270.
2
CS4121
Electrical Characteristics: continued
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
s Function Generator Section: continued Function Generator Error Function Generator Error Function Generator Error Function Generator Error Function Generator Error Function Generator Error Function Generator Gain 13.1V VCC 16V, TA=25C 13.1V VCC 11V, TA=25C 13.1V VCC 8V, TA=25C 25C TA 85C 25C TA 105C 40C TA 25C TA = 25C Q vs F/VOUT Package Lead Description
PACKAGE LEAD # LEAD SYMBOL FUNCTION
-2.5 -1 -3 -3 -5.5 -3 60
0 0 0 0 0 0 77
+2.5 +1 +3 +3 +5.5 +3 95
deg deg deg deg deg deg /V
16L PDIP* 1 2 3 4, 5, 12, 13 6 7 8 9 10 11 14 15 16
20L SO* 1 2 3 4-7, 14-17 8 9 10 11 12 13 18 19 20 CP+ SQOUT FREQIN Gnd COS+ COSVCC BIAS SINSIN+ VREG F/VOUT CPPositive input to charge pump. Buffered square wave output signal. Speed or rpm input signal. Ground Connections. Positive cosine output signal. Negative cosine output signal. Ignition or battery supply voltage. Test point or zero adjustment. Negative sine output signal. Positive sine output signal. Voltage regulator output. Output voltage proportional to input signal frequency. Negative input to charge pump.
*Internally Fused Leads
Typical Performance Characteristics
Figure 1: Function Generator Output Voltage vs Degrees of Deflection
7 6 5 4 6
Figure 2: Charge Pump Output Voltage vs Output Angle F/VOUT = 2.0V + 2 FREQ CT RT (VREG - 0.7)
7
COS
5
Output Voltage (V)
1 0 -1 -2 -3 -4 -5 -6 -7 0 45 90 135 180 225 270 315
F/V Output (V) SIN
3 2
4 3
2 1 0 0 45 90 135 180 225 270 315
Degrees of Deflection ()
Frequency/Output Angle ()
3
CS4121
Typical Performance Characteristics: continued
Figure 3: Output Angle in Polar Form
7V (VSINE+) - (VSINE-)
Figure 4: Nominal Output Deviation
1.50 1.25 1.00 0.75 Deviation () 0.50 0.25 0.00 -0.25 -0.50 -0.75 -1.00 -1.25
Q 7V
Angle +7V
(VCOS+) - (VCOS-)
VSIN+ VSINQ = ARCTAN VCOS+ VCOS-
[
]
-1.50
-7V
0
45
90
135 180 Theoretical Angle ()
225
270
315
Nominal Angle vs. Ideal Angle (After calibrating at 180)
Note: Temperature, voltage and nonlinearity not included.
45 40 35 30 Ideal Angle (Degrees) 25 20
Ideal Degrees
15
Nominal Degrees
10 5 0 1 5 9 13 17 21 25 29 33 37 41 45
Nominal Angle (Degrees)
Table 1: Function Generator Output Nominal Angle vs. Ideal Angle (After calibrating at 270)
Ideal Q Degrees Nominal Q Degrees Ideal Q Nominal Degrees Q Degrees Ideal Q Nominal Degrees Q Degrees Ideal Q Degrees Nominal Q Degrees Ideal Q Nominal Degrees Q Degrees Ideal Q Nominal Degrees Q Degrees
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
0 1.09 2.19 3.29 4.38 5.47 6.56 7.64 8.72 9.78 10.84 11.90 12.94 13.97 14.99 16.00 17.00
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
17.98 18.96 19.92 20.86 21.79 22.71 23.61 24.50 25.37 26.23 27.07 27.79 28.73 29.56 30.39 31.24 32.12
34 35 36 37 38 39 40 41 42 43 44 45 50 55 60 65 70
33.04 34.00 35.00 36.04 37.11 38.21 39.32 40.45 41.59 42.73 43.88 45.00 50.68 56.00 60.44 64.63 69.14 4
75 80 85 90 95 100 105 110 115 120 125 130 135 140 145 150 155
74.00 79.16 84.53 90.00 95.47 100.84 106.00 110.86 115.37 119.56 124.00 129.32 135.00 140.68 146.00 150.44 154.63
160 165 170 175 180 185 190 195 200 205 210 215 220 225 230 235 240
159.14 164.00 169.16 174.33 180.00 185.47 190.84 196.00 200.86 205.37 209.56 214.00 219.32 225.00 230.58 236.00 240.44
245 250 255 260 265 270 275 280 285 290 295 300 305
244.63 249.14 254.00 259.16 264.53 270.00 275.47 280.84 286.00 290.86 295.37 299.21 303.02
Note: Temperature, voltage and nonlinearity not included.
CS4121
Circuit Description and Application Notes The CS4121 is specifically designed for use with air-core meter movements. It includes an input comparator for sensing an input signal from an ignition pulse or speed sensor, a charge pump for frequency to voltage conversion, a bandgap voltage regulator for stable operation, and a function generator with sine and cosine amplifiers to differentially drive the motor coils. From the simplified block diagram of Figure 5A, the input signal is applied to the FREQIN lead, this is the input to a high impedance comparator with a typical positive input threshold of 2.0V and typical hysteresis of 0.5V. The output of the comparator, SQOUT, is applied to the charge pump input CP+ through an external capacitor CT. When the input signal changes state, CT is charged or discharged through R3 and R4. The charge accumulated on CT is mirrored to C4 by the Norton Amplifier circuit comprising of Q1, Q2 and Q3. The charge pump output voltage, F/VOUT, ranges from 2V to 6.3V depending on the input signal frequency and the gain of the charge pump according to the formula: F/VOUT = 2.0V + 2 FREQ CT RT (VREG 0.7V) RT is a potentiometer used to adjust the gain of the F/V output stage and give the correct meter deflection. The F/V output voltage is applied to the function generator which generates the sine and cosine output voltages. The output voltage of the sine and cosine amplifiers are derived from the on-chip amplifier and function generator circuitry. The various trip points for the circuit (i.e., 0, 90, 180, 270) are determined by an internal resistor divider and the bandgap voltage reference. The coils are differentially driven, allowing bidirectional current flow in the outputs, thus providing up to 305 range of meter deflection. Driving the coils differentially offers faster response time, higher current capability, higher output voltage swings, and reduced external component count. The key advantage is a higher torque output for the pointer. The output angle, Q, is equal to the F/V gain multiplied by the function generator gain: Q = AF/V AFG, where: AFG = 77 (typ) /V The relationship between input frequency and output angle is: Q = AFG 2 FREQ CT RT (VREG 0.7V) or, Q = 970 FREQ CT RT The ripple voltage at the F/V converterOs output is determined by the ratio of CT and C4 in the formula: AEV = CT(VREG 0.7V) C4
Design Example
Maximum meter Deflection = 270 Maximum Input Frequency = 350Hz 1. Select RT and CT Q = AGEN AEF/V AEF/V = 2 FREQ CT RT (VREG 0.7V) Q = 970 FREQ CT RT Let CT = 0.0033F, Find RT 270 RT = 970 350Hz 0.0033F RT = 243k1/2 RT should be a 250k1/2 potentiometer to trim out any inaccuracies due to IC tolerances or meter movement pointer placement. 2. Select R3 and R4 Resistor R3 sets the output current from the voltage regulator. The maximum output current from the voltage regulator is 10mA R3 must ensure that the current does not exceed this limit. Choose R3 = 3.3k1/2 The charge current for CT is VREG 0.7V = 1.90mA 3.3k1/2 C1 must charge and discharge fully during each cycle of the input signal. Time for one cycle at maximum frequency is 2.85ms. To ensure that CT is discharged, assume that the (R3 + R4) CT time constant is less than 10% of the minimum input frequency pulse width. T = 285s Choose R4 = 1k1/2. Charge time: T = R3 CT = 3.3k1/2 0.0033F = 10.9s Discharge time:T = (R3 + R4)CT = 4.3k1/2 0.0033F = 14.2s 3. Determine C4 C4 is selected to satisfy both the maximum allowable ripple voltage and response time of the meter movement. C4 = CT(VREG 0.7V) VRIPPLE(MAX)
Ripple voltage on the F/V output causes pointer or needle flutter especially at low input frequencies. The response time of the F/V is determined by the time constant formed by RT and C4. Increasing the value of C4 will reduce the ripple on the F/V output but will also increase the response time. An increase in response time causes a very slow meter movement and may be unacceptable for many applications. 5
With C4 = 0.47F, the F/V ripple voltage is 44mV. Figure 7 shows how the CS4121 and the CS-8441 are used to produce a Speedometer and Odometer circuit.
CS4121
Circuit Description and Application Notes: continued
VREG 2.0V R3 VC(t) + FREQIN
+
F/VOUT
+
F to V RT C4
0.25V
Q3
CP
SQOUT
CT QSQUARE
R4
CP+ Q1 Q2
2.0V
Figure 5A: Partial Schematic of Input and Charge Pump
T PW VCC FREQIN 0 VREG T-PW
SQOUT 0
ICP+
VCP+ 0
Figure 5B: Timing Diagram of FREQIN and ICP
6
CS4121
Speedometer/Odometer or Tachometer Application
R3 Speedo Input R2 C3 CT
R4
1 2 3 4 5 6
CP+ CP+ SQOUT FREQIN
CP- 16 F/VOUT 15 VREG 14
C4
+
RT
Gnd COS+ COSVCC
CS4121
Gnd
Gnd 13 Gnd 12 SINE+ 11 SINE- 10 BIAS 9
Battery D1 R1 D2 C1
7 8
COSINE Gnd Air Core Gauge 200W
SINE
Speedometer
Figure 6 R1 - 3.9, 500mW R2 - 10k1/2 R3 - 3k1/2 R4 - 1k1/2 RT - Trim Resistor +/- 20 PPM/C 243k1/2 C1 - 0.1F C3 - 0.1F C4 - 0.47F CT - 0.0033F, +/- 30 PPM/C D1 - 1A, 600 PIV D2 - 50V, 500mW Zener Note 1: For 58% Speed Input TMAX 5/fMAX where TMAX = CT(R3+R4) fMAX = maximum speed input frequency
R3 Speedo Input R2 C3 CT
R4
1 2 3 4 5 6
CP+ CP+ SQOUT FREQIN
CP- 16 F/VOUT 15 VREG 14
C4
+
RT
Gnd COS+ COSVCC
CS4121
Gnd
Gnd 13 Gnd 12 SINE+ 11 SINE- 10 BIAS 9
Battery D1 R1 D2 C1
7 8
COSINE Gnd Air Core Gauge 200W
SINE
Speedometer
C2
1
CS8441
Air Core Stepper Motor 200W
Odometer
Figure 7 Note 1: The product of CT and RT have a direct effect on gain and therefore directly affect temperature compensation Note 2: CT Range; 20pF to .2F Note 3: RT Range; 100k1/2 to 500k1/2 Note 4: The IC must be protected from transients above 60V and reverse battery conditions Note 5: Additional filtering on FREQIN lead may be required
7
CS4121
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA
D Lead Count 16L PDIP* 20L SOIC* Metric Max Min 19.69 18.67 13.00 12.60 English Max Min .775 .735 .512 .496
Thermal Data RQJC typ RQJA typ
16L PDIP* 15 50
20L SOIC* 9 55
uC/W uC/W
*Internally Fused Leads
Plastic DIP (N); 300 mil wide
7.11 (.280) 6.10 (.240)
8.26 (.325) 7.62 (.300) 3.68 (.145) 2.92 (.115)
1.77 (.070) 1.14 (.045)
2.54 (.100) BSC
.356 (.014) .203 (.008)
0.39 (.015) MIN. .558 (.022) .356 (.014) Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same.
REF: JEDEC MS-001
D
Surface Mount Wide Body (DW); 300 mil wide
7.60 (.299) 7.40 (.291)
10.65 (.419) 10.00 (.394)
0.51 (.020) 0.33 (.013)
1.27 (.050) BSC
2.49 (.098) 2.24 (.088)
2.65 (.104) 2.35 (.093)
1.27 (.050) 0.40 (.016)
REF: JEDEC MS-013
0.32 (.013) 0.23 (.009) D 0.30 (.012) 0.10 (.004)
Ordering Information
Part Number CS4121ENF16 CS4121EDWF20 CS4121EDWFR20
Description 16L PDIP (internally fused leads) 20L SOIC (internally fused leads) 20L SOIC (internally fused leads) (tape & reel) 8
Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information.
(c) 1999 Cherry Semiconductor Corporation
Rev. 12/4/96


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